Switching Frequency Optimal Pwm Control Of A Three-Level Inverter, elektronika, elektronika, INWERTERY
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IEEE TRANSACTIONS ON POWER ELECTRONICS,
VOL.
7,
NO.
3,
JULY 1992
487
Switching Frequency Optimal
PWM
Control
of
a
Three-Level Inverter
Jurgen
K.
Steinke, Member, IEEE
Abstract-A
pulse-width modulation (PWM) method for the
control of a three-level inverter is described. Switching fre-
quency optimal-PWM method (SFO-PWM) works with a con-
stant carrier frequency not synchronized with fundamental
stator frequency. SFO-PWM gives an optimal utilization of
mean thyristor switching frequency permitted, therefore PWM
carrier frequency may be chosen to a value of two times the
permitted mean thyristor switching frequency. The signal pro-
cessing structure is simple. Many applications of three-level-
inverters work with a dc-link neutral point not stabilized from
the power input converter.
A
neutral-point potential control
is
described, which is capable of stabilizing potential by varying
the switching sequences of the three-level inverter itself. Re-
sults from computer simulation and practical experience show
the good performance of SFO-PWM.
equality of a phase reference voltage and the carrier signal
is the phase switching instant (Fig. 1). The sample period
Tsp
may be defined as the time interval between two suc-
cessive peak values (a positive and a negative one) of the
carrier signal. The mean values of phase output and phase
reference voltage taken over one sample period match only
then, when the amplitude of the carrier signal
is
equal to
that value of phase reference voltage, which represents
half of the dc-link voltage.
In a free-running PWM the carrier signal has a constant
frequency not synchronized with fundamental stator fre-
quency. Mean thyristor switching frequency is constant
in this case. Working with a conventional two-level in-
verter, carrier frequency
fc
may be chosen to be equal to
maximum thyristor switching frequency
fTmax
permitted.
Within each period
T,
of camer signal each thyristor of
the inverter is switched on and off once. The phase output
voltage is switched from
+
to
-
within a sample period
with positive slope of carrier signal and switched from
-
to
+
within a sample period with negative slope of carrier
signal.
I. INTRODUCTION
HE most common method for controlling output volt-
T
ages of a voltage source inverter is pulse-width mod-
ulation (PWM). Usually the total stator frequency range
is not covered by only one PWM method. At low stator
frequencies, a free-running PWM with constant sampling
frequency is applied. In the middle frequency range and,
depending on permitted mean thyristor switching fre-
quency, up to high stator frequencies, synchronized PWM
is used. At very high stator frequencies, full block wave-
forms are applied. Nabae et al. [l] reported about syn-
chronized PWM for three-level inverter control: This pa-
per presents a simple online calculation scheme for free-
running PWM pulse patterns for this inverter type. Be-
cause of achieving the highest sampling frequency pos-
sible without overloading the inverter, the presented
method is called Switching Frequency Optimal PWM
control (SFO-PWM). The optimal utilization of the in-
verters switching capability results in the lowest torque
ripple achievable for a three-level inverter fed induction
machine with the inverter controlled by PWM.
Free-running PWM gives good results if sampling fre-
quency is much higher than the fundamental frequency of
the output voltage. For two-level inverters a common
method to get the pulse patterns for a free-running PWM
is to compare three time-dependent phase reference volt-
ages with a triangular carrier signal. The moment of
OPTIMALPWM METHOD
A.
Fundamental Principles
of
SFO-PWM
Working with a three-level inverter there are two
thyristor pairs within each phase of the inverter (Fig. 2):
Tl/T3 and T2/T4. The simplest approach for control-
ling the three-level inverter is to apply the same control
as for a two-level inverter. This would lead to switching
both thyristor pairs within each sample period. The carrier
frequency has to be chosen equal to permitted thyristor
switching frequency and the amplitude of the carrier sig-
nal has to be equal to half dc-link voltage 2E
(
Vd
=
4E).
In this paper, a PWM control method called switching
frequency optimal PWM (SFO-PWM) is described. By
using two carrier signals for modulation (Fig. 3), only one
thyristor pair of each phase of the inverter is switched per
sample period. The mean switching load of the thyristor
pairs is balanced. Therefore, the mean thyristor switching
frequency in SFO-PWM is only one half of carrier fre-
quency. Carrier frequency may be set to
f,
=
2fTmax.
Looking at phase
b
of the inverter, for exampIe, the
output voltage
VbM
of the phase may be switched from
0 to
+2E
or +2E to
0
by switching the thyristor pair
(T1 /T3)b. When thyristor pair (T2/T4), is switched, the
phase output voltage may be switched from
0
to -2E or
-2E to 0. If the phase reference voltage for a sample
11. SWITCHING
FREQUENCY
Manuscript received February
14,
1990; revised February 25, 1992. This
paper
was
presented at the 1989 European Conf. on Power Electronics and
Applications, Aachen, Germany, Oct. 9-12.
The author is with Asea Brown Boveri, ABB Drives AG, Ch-5300 Turgi,
Switzerland.
IEEE Log Number 9200722.
0885-8993/92$03.00
0
1992 IEEE
-
IEEE TRANSACTIONS ON POWER ELECTRONICS,
VOL.
7,
NO. 3,
JULY
1992
488
carrier period
TO
L+
T-
time
Lsarnple period TSP
4
L-
0
switchingfrom (T1
a
off/T2a on)
to
(T1a on/ T2a
off)
0
switchingfrom (Tla on/ T2a off)
to
Crla
offR2a on)
Fig. 1. Camer signal and reference voltage for two-level inverter PWM
control.
L+
L-
L
Fig.
2.
Circuit diagram
of
a three-level inverter.
,
,
,
,
age in a steady state. Therefore the phase reference volt-
age is positive within one half of the fundamental period
and negative within the other half. This balances the mean
load of all thyristor pairs. The described simple funda-
mental idea is the basis of SFO-PWM, which has a very
simple signal processing structure. This simple structure
also makes it possible to add a neutral-point potential con-
trol. With the potential control not engaged, the switching
sequences within a sample period are similar to those re-
ceived from control methods called space-vector modu-
lation [2] or space-vector approximation [3], [4].
~~1~.
carrier signal
1
Va
I
I,
..
.
transformation
into the
interval
[-Vdh.+Vd14]
I
I,
B. Basic Signal Processing Structure
Instead of using two carrier signals it is also possible
to work with only one carrier with an amplitude of a
quarter of dc-link voltage
(E
=
Vd/4). This is achieved
by subtracting
E
from the positive carrier and the positive
reference voltages and adding
E
to the negative camer
and the negative reference voltages (Fig. 3).
shows
the basic structure of SFO-PWM. The first main block is
“sign identification and shift” block. In an initial step,
sign of each phase reference voltage is determined. Three
sign signals are sent to the second main block “phase out-
put signal control.” If, for example, the sign of
i?b
is
pos-
itive, the phase output signal control sets thyristor pair
(T1/T3)b to the constant state (Tlb
off,
T3b
on) and con-
nects thyristor pair (T2/T4)b to the output
Tb
of the pulse-
width modulator. If the sign is negative, thyristor pair
(T2/T4)b is switched to the constant switching state (T2b
I
LTsp
Fig.
3.
Carrier signals and reference voltages for three-level inverter
control.
-Vd4
period is positive, only thyristor pair (T1/T3), has to be
switched. If the phase reference voltage is negative, only
pair (T2/T4), has to change its switching state within the
sample period. Therefore switching instants resulting from
comparing the positive carrier signal with the reference
voltages lead to switching of thyristor pairs (T1/T3) while
switching instants resulting from comparison of the neg-
ative carrier signal with the reference voltages leads to
switching of thyristor pairs (T2/T4). In drive applica-
tions, the phase reference voltage is a sinusoidal ac volt-
489
STEINKE: SWITCHING FREQUENCY OPTIMAL
PWM
CONTROL
identifica-
PWM
tion and
shift
Fig.
4.
Basic SFO-PWM structure
on, T4b
off)
and thyristor pair (Tl/T3)b is connected to
the PWM Output Tb.
liil
Fig.
5.
Output voltage operating range of a three-level inverter.
C.
Preprocessing the Phase Reference Voltages
1)
Symmetry About the Zero Axis:
Phase reference
voltages from induction machine control are normally free
from a zero sequence voltage system. Often, a voltage
space vector
v,
represents the phase reference voltages.
+
avbr
+
a'v,,);
a
=
exp (j27~/3).
v,
=
2/3
(U,,
v,
represents the voltage space vector that leads controlled
machine values to their setpoint values within the next
sample period. Using space-vector representation of the
output voltages of a three-level inverter,
shows the
range of output voltages that may be covered by PWM.
If working with three phase-reference voltages instead of
a voltage space vector, it is not possible to utilize the
whole output range with the phase reference voltage sys-
tem being free from a zero sequence voltage system
[5].
The whole range may be utilized, if the zero sequence
voltage system is added to the three-phase reference volt-
ages that makes the absolute values of the maximum and
the minimum phase reference voltage equal to each other.
If the original system of phase reference voltages does not
contain a zero sequence voltage system, half of the ref-
erence voltage with the lowest absolute value within the
three has to be added to each one of them. After this trans-
formation, the condition
U,
max
=
-
v,
m,n
is fulfilled. A
zero sequence voltage system has no influence on ma-
chine voltage because normal induction machines do not
have a neutral terminal connected to the inverter.
2)
Sign Equality
of
the Three-phase Reference
Voltages:
A premise to the fundamental idea of SFO-
PWM was the assumption that it is sufficient to take the
average of thyristor switching frequency over a complete
fundamental period. Working only with the basic struc-
ture of SFO-PWM, within one half of fundamental period
one thyristor pair switches with double mean switching
frequency, whereas during the remaining half it does not
switch at all. If the fundamental frequency is very low,
averaging over a complete fundamental period must not
be applied for evaluation of the mean thyristor switching
load. In induction machine control, low fundamental fre-
quencies cause the machine voltages to be small. Refer-
Fig.
6.
Resulting carrier signal for three-level inverter PWM control in the
low-voltage operating mode.
ence voltage space vectors are always included inside the
half voltage hexagon of the inverters output range (Fig.
5).
After transformation of the phase reference voltages
is within the voltage interval
[-E
*
-
+E].
By adding
the zero sequence voltage system
(E,
E,
E),
each of the
new reference voltages is now positive. Subtracting
(E,
E,
E)
from the reference voltage system leads to three
negative reference voltages. Applying basic SFO pro-
cessing, positive reference voltages lead to a constant state
of thyristor pairs (T2/T4) and negative reference volt-
ages lead to a constant state of thyristor pairs (Tl/T3).
If addition and subtraction of
(E, E, E)
alternate with
equal intervals of addition and subtraction, and if syn-
chronization with
fc
exists, fundamental frequency now
has no influence on the intervals
of
double and zero
switching frequency. The interval length of addition and
subtraction of
(E,
E,
E)
has to be an even multiple of a
sample period. The carrier signal has to be inverted when
changing from addition to subtraction or vice versa. These
two conditions for getting optimal results were derived in
[5].
Fig.
6
shows the resulting camer signal.
shows
a complete block diagram of phase reference voltage pre-
processing. Operating mode with addition or subtraction
of an
(E,
E, E)
system will be called the "low-voltage
mode," whereas the operating mode without addition or
subtraction of an
(E, E,
E)
voltage system will be called
the "normal mode."
to
U,
max
= -
U,
min,
each of the phase reference voltages
IEEE TRANSACTIONS ON POWER ELECTRONICS,
VOL.
7,
NO.
3,
JULY
1992
490
transformation
three phase
reference
operating
operating range
determination
Fig. 7. Block diagram of a phase reference voltage preprocessing unit.
-
Ill’
I
II
I
A
-
Fig. 8. Block diagram of the simulated drive system
SIMULATION
pI
Complete system consisting of a machine control,
SFOnPWM, three-level inverter and a squirrel cage in-
duption
motor was simulated (Fig.
8).
The parameters of
fit
inverter and induction machine were taken from the
ppv
locomotive Re
4/4
Serie
460
for “Bahn 2000”-
project of the Switzerland railways
(SBB)
(see Table I).
The
machine control applied was described in
[5].
The
bpi9 structure was derived from direct self-control
[6]-
[I$],
Total stator flux linkage and torque are calculated
from measured values of machine currents and speed.
Machine voltages are derived from dc-link voltages
udl
and
trd2
and the actual switching state of the inverter. Ma-
chine
control calculates the reference voltage space vec-
tor that leads torque and stator
flux
to their setpoint val-
ups
within the next sample period.
show the
performance of the simulated system. Carrier frequency
yas
get to
400 Hz
(T,
=
2.5 ms,
Tsp
=
1.25
ms).
In Fig.
9
pimulated curves at steady-state operation withp n
=
Or2fsN
and
T
=
OST,
are shown. The switching state sig-
nals
of phase thyristors (Fig. 9(d)) indicate operation with
alternating addition or subtraction of the
(E, E,
E)
sys-
tem, In Fig.
10
simulated curves at steady-state operation
withp
*
n
=
0.75fN
and
T
=
0.5TB
are shown. Switching
st#@
signals of phase thyristors show normal operation
without an
(E, E, E)
shift. Fig. 11 shows the dynamic
wflormance at
p
111.
RESULTS
FROM
COMPUTER
TABLE I
IMPORTANT PARAMETERS
OF
INVERTER
AND
MOTOR
OF
THE
SIMULATED
DRIVESYSTEM
Inverter
Cd
=
13.8 mF
Vd
=
3500
V
fT
=
200
Hz
dc-link capacity
nominal dc-link voltage
GTO switching frequency
Motor
VN
=
2640
v
1,
=
315 A
PN
=
1200
kW
fsN
=
54
Hz
nN
=
1595
rpm
TN
=
7180
Nm
T,
=
25860 Nm
U
=
5.9%
p=2
nominal voltage
nominal current
nominal power
nominal stator frequency
nominal speed
nominal shaft torque
breakdown torque
leakage factor
number of pole pairs
of torque operation changes from operation with the
(E,
E,
E)
shift to operation without the shift.
shows
the dynamic performance at
p
n
=
0.75fN.
Torque
changes are also very rapid.
OF THE
DC-LINKNEUTRAL-POINT
POTENTIAL
Figs. 9-12 also document the variation of the neutral-
point potential. In a steady state using SFO-PWM there
IV. CONTROL
n
=
0.2fN. During the rapid change
II 1
48
1
STEINKE: SWITCHING FREQUENCY OPTIMAL PWM CONTROL
.
81
-05
-10
-1.1
-2
0
hmr
in mr
(e)
Fig.
9.
Simulation results atp
.
n
=
0.2hN,
T
=
0.5TB.
(a) Torque. (b)
Current of phase
a.
(c) Machine voltage of phase
a.
(d) Switching state
signals of phase
a
thyristor pairs.
(e)
Voltage difference
AV,
of ideal and
real dc-link neutral-point potential.
L
I
0
12,5
25
37.5
time in
ms-
‘1
10
21
timeinms
-2
0
(e)
Fig.
10.
Simulation results atp
.
n
=
O.75hN,
T
=
0.5TB.
(a) Torque.
(b)
Current
of
phase
a.
(c) Machine voltage of phase
a.
(d) Switching state
signals of phase a thyristor pairs. (e) Voltage difference
Avd
of ideal and
real dc-link neutral-point potential.
ni
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