Switch Mode Power Supply (Smps) Topologies (Part I) Microchip, zasilacze
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AN1114
Switch Mode Power Supply (SMPS) Topologies (Part I)
Author: Mohammad Kamil
Microchip Technology Inc.
EQUATION 1: SHUNT-CONTROLLED
REGULATOR POWER LOSS
P
LOSS
=
V
OUT
⋅
I
S
+
( )
2
+
I
S
⋅
R
S
INTRODUCTION
The industry drive toward smaller, lighter and more
efficient electronics has led to the development of the
Switch Mode Power Supply (SMPS). There are several
topologies commonly used to implement SMPS.
This application note, which is the first of a two-part
series, explains the basics of different SMPS
topologies. Applications of different topologies and
their pros and cons are also discussed in detail. This
application note will guide the user to select an
appropriate topology for a given application, while
providing useful information regarding selection of
electrical and electronic components for a given SMPS
design.
However, if we control the output voltage V
OUT
by
varying R
S
and keeping I
S
zero, the ideal power loss
inside the converter can be calculated as shown in
Equation 2.
EQUATION 2: SERIES-CONTROLLED
REGULATOR POWER LOSS
P
LOSS
=
V
IN
2
⋅
--------------------------
R
S
( )
2
R
S
+
R
L
This type of converter is known as a series-controlled
regulator. The ideal power loss in this converter
depends on the value of the series resistance, R
S
,
which is required to control the output voltage, V
OUT
,
and the load current, I
OUT
. If the value of R
S
is either
zero or infinite, the ideal power loss inside the
converter should be zero. This feature of a
series-controlled regulator becomes the seed idea of
SMPS, where the conversion loss can be minimized,
which results in maximized efficiency.
In SMPS, the series element, R
S
, is replaced by a
semiconductor switch, which offers very low resistance
at the ON state (minimizing conduction loss), and very
high resistance at the OFF state (blocking the
conduction). A low-pass filter using non-dissipative
passive components such as inductors and capacitors
is placed after the semiconductor switch, to provide
constant DC output voltage.
The semiconductor switches used to implement switch
mode power supplies are continuously switched on and
off at high frequencies (50 kHz to several MHz), to
transfer electrical energy from the input to the output
through the passive components. The output voltage is
controlled by varying the duty cycle, frequency or
phase of the semiconductor devices’ transition periods.
As the size of the passive components is inversely
proportional to the switching frequency, a high
switching frequency results in smaller sizes for
magnetics and capacitors.
While the high frequency switching offers the designer
a huge advantage for increasing the power density, it
adds power losses inside the converter and introduces
additional electrical noise.
WHY SMPS?
The main idea behind a switch mode power supply can
easily be understood from the conceptual explanation
of a DC-to-DC converter, as shown in Figure 1. The
load, R
L
, needs to be supplied with a constant voltage,
V
OUT
, which is derived from a primary voltage source,
V
IN
. As shown in Figure 1, the output voltage V
OUT
can
be regulated by varying the series resistor (R
S
) or the
shunt current (I
S
).
When V
OUT
is controlled by varying I
S
and keeping R
S
constant, power loss inside the converter occurs. This
type of converter is known as shunt-controlled
regulator. The power loss inside the converter is given
by Equation 1. Please note that the power loss cannot
be eliminated even if I
S
becomes zero.
FIGURE 1:
DC-DC CONVERTER
R
S
I
OUT
V
IN
I
S
R
L
V
OU
T
©
2007 Microchip Technology Inc.
DS01114A -page 1
I
OUT
AN1114
SELECTION OF SMPS TOPOLOGIES
Buck Converter
There are several topologies commonly used to
implement SMPS. Any topology can be made to work
for any specification; however, each topology has its
own unique features, which make it best suited for a
certain application. To select the best topology for a
given specification, it is essential to know the basic
operation, advantages, drawbacks, complexity and the
area of usage of a particular topology. The following
factors help while selecting an appropriate topology:
a) Is the output voltage higher or lower than the
whole range of the input voltage?
b) How many outputs are required?
c) Is input to output dielectric isolation required?
d) Is the input/output voltage very high?
e) Is the input/output current very high?
f) What is the maximum voltage applied across the
transformer primary and what is the maximum
duty cycle?
Factor (a) determines whether the power supply
topology should be buck, boost or buck-boost type.
Factors (b) and (c) determine whether or not the power
supply topology should have a transformer. Reliability
of the power supply depends on the selection of a
proper topology on the basis of factors (d), (e) and (f).
A buck converter, as its name implies, can only
produce lower average output voltage than the input
voltage. The basic schematic with the switching
waveforms of a buck converter is shown in Figure 2.
In a buck converter, a switch (Q
1
) is placed in series
with the input voltage source V
IN
. The input source V
IN
feeds the output through the switch and a low-pass
filter, implemented with an inductor and a capacitor.
In a steady state of operation, when the switch is ON for
a period of T
ON
, the input provides energy to the output
as well as to the inductor (L). During the T
ON
period, the
inductor current flows through the switch and the
difference of voltages between V
IN
and V
OUT
is applied
to the inductor in the forward direction, as shown in
Figure 2 (C). Therefore, the inductor current I
L
rises
linearly from its present value I
L
1
to I
L
2,
as shown in
Figure 2 (E).
During the T
OFF
period, when the switch is OFF, the
inductor current continues to flow in the same
direction, as the stored energy within the inductor
continues to supply the load current. The diode D1
completes the inductor current path during the Q
1
OFF
period (T
OFF
); thus, it is called a freewheeling diode.
During this T
OFF
period, the output voltage V
OUT
is
applied across the inductor in the reverse direction, as
shown in Figure 2 (C). Therefore, the inductor current
decreases from its present value I
L
2
to I
L
1,
as shown in
Figure 2 (E).
DS01114A -page 2
©
2007 Microchip Technology Inc.
AN1114
FIGURE 2:
BUCK CONVERTER
I
IN
Q
1
L
I
OUT
(A)
V
IN
+
I
L
-
D
1
V
OUT
(B)
Q
1GATE
t
(C)
V
L
V
IN
-
V
OUT
t
-
V
OUT
(
V
IN
-
V
OUT
)/L
(D)
I
IN
t
I
L2
-
V
OUT
/L
(E)
I
L
I
L1
t
(A)
= Buck converter
(B)
= Gate pulse of MOSFET Q
1
(C)
= Voltage across the Inductor L
(D)
= Input current I
IN
(E)
= Inductor current I
L
CONTINUOUS CONDUCTION MODE
The inductor current is continuous and never reaches
zero during one switching period (T
S
); therefore, this
mode of operation is known as Continuous Conduction
mode. In Continuous Conduction mode, the relation
between the output and input voltage is given by
Equation 3, where D is known as the duty cycle, which
is given by Equation 4.
EQUATION 4: DUTY CYCLE
D
=
T
ON
T
S
where:
T
ON
= ON Period
T
S
= Switching Period
EQUATION 3: BUCK CONVERTER V
OUT
/V
IN
RELATIONSHIP
If the output to input voltage ratio is less than 0.1, it is
always advisable to go for a two-stage buck converter,
which means to step down the voltage in two buck
operations. Although the buck converter can be either
continuous or discontinuous, its input current is always
discontinuous, as shown in Figure 2 (D). This results in
a larger electromagnetic interference (EMI) filter than
the other topologies.
V
OUT
=
DV
IN
⋅
©
2007 Microchip Technology Inc.
DS01114A -page 3
----------
AN1114
CURRENT MODE CONTROL
While designing a buck converter, there is always a
trade-off between the inductor and the capacitor size
selection.
A larger inductor value means numerous turns to the
magnetic core, but less ripple current (<10% of full load
current) is seen by the output capacitor; therefore, the
loss in the inductor increases. Also, less ripple current
makes current mode control almost impossible to
implement (refer to
“Method of Control”
for details on
current mode control techniques). Therefore, poor load
transient response can be observed in the converter.
A smaller inductor value increases ripple current. This
makes implementation of current mode control easier,
and as a result, the load transient response of the
converter improves. However, high ripple current
needs a low Equivalent Series Resistor (ESR) output
capacitor to meet the peak-to-peak output voltage
ripple requirement. Generally, to implement the current
mode control, the ripple current at the inductor should
be at least 30% of the full load current.
of operation (inductor current reaches zero in one
switching cycle). This may happen if the buck converter
inductor is designed for a medium load, but needs to
operate at no load and/or a light load. In this case, the
output voltage may fall below the regulation limit, if the
synchronous MOSFET is not switched off immediately
after the inductor reaches zero.
MULTIPHASE SYNCHRONOUS BUCK
CONVERTER
It is almost impractical to design a single synchronous
buck converter to deliver more than 35 amps load
current at a low output voltage. If the load current
requirement is more than 35-40 amps, more than one
converter is connected in parallel to deliver the load.
To optimize the input and output capacitors, all the
parallel converters operate on the same time base and
each converter starts switching after a fixed time/phase
from the previous one. This type of converter is called
a multiphase synchronous buck converter. Figure 3
shows the multiphase synchronous buck converter
with a gate pulse timing relation of each leg and the
input current drawn by the converter. The fixed
time/phase is given by
Time period/n
or 300
/n
, where “
n
”
is the number of the converter connected in parallel.
The design of input and output capacitors is based on
the switching frequency of each converter multiplied by
the number of parallel converters. The ripple current
seen by the output capacitor reduces by “n” times. As
shown in Figure 3 (E), the input current drawn by a
multiphase synchronous buck converter is continuous
with less ripple current as compared to a single
converter shown in Figure 2 (D). Therefore, a smaller
input capacitor meets the design requirement in case of
a multiphase synchronous buck converter.
FEED-FORWARD CONTROL
In a buck converter, the effect of input voltage variation
on the output voltage can be minimized by
implementing input voltage feed-forward control. It is
easy to implement feed-forward control when using a
digital controller with input voltage sense, compared to
using an analog control method. In the feed-forward
control method, the digital controller starts taking the
appropriate adaptive action as soon as any change is
detected in the input voltage, before the change in input
can actually affect the output parameters.
SYNCHRONOUS BUCK CONVERTER
When the output current requirement is high, the
excessive power loss inside the freewheeling diode D1,
limits the minimum output voltage that can be
achieved. To reduce the loss at high current and to
achieve lower output voltage, the freewheeling diode is
replaced by a MOSFET with a very low ON state
resistance R
DSON
. This MOSFET is turned on and off
synchronously with the buck MOSFET. Therefore, this
topology is known as a synchronous buck converter. A
gate drive signal, which is the complement of the buck
switch gate drive signal, is required for this
synchronous MOSFET.
A MOSFET can conduct in either direction; which
means the synchronous MOSFET should be turned off
immediately if the current in the inductor reaches zero
because of a light load. Otherwise, the direction of the
inductor current will reverse (after reaching zero)
because of the output LC resonance. In such a
scenario, the synchronous MOSFET acts as a load to
the output capacitor, and dissipates energy in the
R
DSON
(ON state resistance) of the MOSFET, resulting
in an increase in power loss during discontinuous mode
DS01114A -page 4
©
2007 Microchip Technology Inc.
AN1114
FIGURE 3:
MULTIPHASE SYNCHRONOUS BUCK CONVERTER
+
IQ
1
I
Q
3
I
Q
5
Q
1
Q
3
Q
5
L
3
L
2
L
1
I
L3
V
OUT
(A)
C
IN
V
IN
I
L2
I
L1
C
O
Q
2
Q
4
Q
6
-
I
L
1
(B)
Q
1PWM
t
I
L2
(C)
Q
3PWM
t
I
L
3
(D)
Q
5PWM
t
IQ
5
+IQ
1
IQ
1
IQ
1
+IQ
3
IQ
3
+IQ
5
IQ
5
+IQ
1
IQ
3
IQ
5
(E)
I
IN
t
(A)
= Multiphase Synchronous Buck converter
(B)
= Gate pulse of Q
1
, inductor current I
L1
(C)
= Gate pulse of Q
3
, Inductor current I
L2
(D)
= Gate pulse of Q
5
, Inductor current I
L3
(E)
= Input current I
IN
©
2007 Microchip Technology Inc.
DS01114A -page 5
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